Are the idle time constant multipliers supposed to change with Hi Res?
I was reviewing the idle settings now that I have gone to hi res and I notice that the time constant multipliers that are listed in the Idle Control Closed Loop tab are a factor of 10 bigger. Namely, in my old setup when I brought up that window I saw that each of the time constants was to be multiplied by 0.01 (same as in the reference manual). Now when I bring up that window it says that each number is multiplied by 0.1.
This is for Fast Recovery, Slow Recovery, Startup Delay and Closure Speed. The text now reads for example: Fast Recovery (x 0.1 sec) where as before it read Fast Recovery (x 0.01 sec). Is there a Hi Res FAQ that covers this? (or is there something else that would cause this change) Same version of Megatune (according to the About tab, all I did was change to the Hi Res code, at least to my knowledge that is all I did). |
that's interesting and if factual would explain why I get stalls with the a/c now
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Originally Posted by Ben
(Post 257501)
that's interesting and if factual would explain why I get stalls with the a/c now
I stalled with AC too, which is why I started looking at it. I don't know the MS architecture, where would I look to see what the actual multiplier is? (my current installation definitely says x 0.1 whereas the prior installation says x 0.01; I don't know where to look to see what multiplier is actually being used). |
I went to the MSNS-Extra forum and searched for "typo" and this popped up:
http://www.msextra.com/viewtopic.php...t=typo#p119405 I assume that means that the actual multiplier in the code is 0.1 and not 0.01 as it is listed in the .ini (and that the typo in the .ini does not change the actual multiplier used). I don't know how to find the multiplier in the actual code but I suspect that if it were the actual multiplier that was changed that folk would have seen it long before me. |
Uhm, I know this is older, but I just wanted to point out that these timers are x0.1s in HiRes instead of x0.01s in LoRes, because this resolution was moved from these parameters to the PW calculations.
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Originally Posted by Spookyfish
(Post 315084)
Uhm, I know this is older, but I just wanted to point out that these timers are x0.1s in HiRes instead of x0.01s in LoRes, because this resolution was moved from these parameters to the PW calculations.
First, the extra resolution in hi-rez was gained by stealing away the high-precision timer that was previously used to drive the PWM injector circuits which made low-impedance peak-and-hold operation possible. That timer was a hardware resource that was used only for that one purpose in the original code. Second, I just pulled up a copy of the source code for both HR10g and 029y5 and inspected the PWM Idle routines for both. Thyey are 100% identical. The section of code pasted below is unchaged from 029y5 to HR10g. In particular, note the comment in the "Close_AIC:" section which reards "; with this many 1/10 sec between steps" I'm pretty sure that aseer is right about this simply being a typo. ;-- PWM Mode ------------------------------------------------------------------- idlePWM: brset istartbit,EnhancedBits6,Crank_PWM ; loop to stabilize on startup brset crank,engine,Crank_PWM ; open AIC for cranking brclr running,engine,Idle_doneJMP1 ; no PWM adjust when not running ; brset crank,engine,jeskipAdjust ; Don't adjust idle during cranking lda feature13_f bit #idle_warmupb beq idle_closedloop ; bra idle_closedloop ;?? this prevents open loop from working ; Warmup PWM idle_openloop: lda coolant cmp slowIdleTemp_f blo idle_loopcold lda feature13_f ; If we are not using closed loop then clear DC bit #idle_clb beq clrNskip bra idle_closedloop clrNskip: lda idle_dc_hi ; Store hot DC in Idle DC sta idleDC ; Added for setting idle DC as if ignition turned bra idle_DoneJMP1 ; on when engine hot idle_loopcold: ; determine duty cycle by linear interpolation lda fastIdletemp_f sta liX1 lda slowIdleTemp_f sta liX2 lda idle_dc_lo sta liY1 lda idle_dc_hi sta liy2 ; rmd upper duty limit lda coolant sta liX jsr lininterp mov liY,idleDC bra idle_closedloop Idle_doneJMP1: jmp Idle_done Crank_PWM: brset istartbit,EnhancedBits6,start_delay lda fastIdletemp_f ; interpolate delay to 0 at sta tmp1 ; slow idle temp lda slowIdleTemp_f sta tmp2 lda idlestartclk_f sta tmp3 clr tmp4 mov coolant,tmp5 jsr lininterp ; mov tmp6,idleDelayClock lda tmp6 sta idleDelayClock start_delay: lda idlecrankdc_f sta idleDC sta idlelastdc bset istartbit,EnhancedBits6 ; let em know we are starting... lda idledelayClock ; Make sure we settle here for a bit bne idle_doneJMP1 ; clear the bit after the wait time bclr istartbit,EnhancedBits6 ; we are no longer starting bset idleon,engine ; we want to idle down bset idashbit,EnhancedBits6 ; we want to bypass the rpm test for a bit lda idlestartclk_f ; load start delay clock again cmp idleDelayClock_f bhi longer_delay lda idleDelayClock_f longer_delay: sta idleDelayClock ; to allow for the decay time Idle_doneJMP2: jmp Idle_done idle_closedloop: ; brclr idle_cl,feature7,Idle_doneJMP1 lda feature13_f bit #idle_clb beq idle_DoneJMP1 lda tps cmp IdleThresh_f ; compare tps with treshold bhi close_AIC ; tps based closure IDLE_RPM: ; Ubipa's idle regulation code lda #24T cmp rpm ; now check rpms blo revs_over ; make sure rpms below are < 2400 rpm clr intacc1 ; routine to determine 8 bit RPM value x10 clr intacc1+1 ldhx rpmph sthx intacc2 lda #10T ldx rpmk_f1+1 ; LSB of multiplicand. mul sta intacc1+3 ; LSB of result stored. stx intacc1+2 ; Carry on stack. lda #10T ldx rpmk_f1 ; MSB of multiplicand. mul add intacc1+2 ; Add in carry from LSB. sta intacc1+2 ; MSB of result. jsr udvd32 ; 32 / 16 divide lda intacc1+3 ; get 8-bit RPM result sta idlerpm ; of current RPM x10 bra IDLE_SPEED revs_over: ; ensure that revs do not overflow lda #240T ; set at 2400 rpm sta idlerpm bra IDLE_SPEED close_AIC_rpm: brset idashbit,EnhancedBits6,rpm_delay ; but not if dashpot is set close_AIC: bclr idashbit,EnhancedBits6 ; turn off dashpot bit bclr idleon,engine ; turn off idle bit lda idleCtlClock ; step close the AIC cmp Idashdelay_f ; with this many 1/10 sec between steps blo Idle_doneJMP2 clr idleCtlClock lda idleDC cmp idleclosedc_f bls Idle_doneJMP2 deca sta idleDC bra Idle_doneJMP2 idash: ; simplified dashpot brset idashbit,EnhancedBits6,idle_doneJMP2 bset idleon,engine bset idashbit,EnhancedBits6 lda idledashdc_f ; take lastidleDC add idlelastdc ; add dashDC sta idleDC lda IdleDelayClock_f ; start delay clock sta idleDelayClock bra idle_doneJMP IDLE_SPEED: ; Determine idle speed target lda slowIdle_f ; based on coolant temp and targets cmp idleTarget beq RPM_TEST lda fastIdletemp_f sta tmp1 lda slowIdleTemp_f sta tmp2 lda fastIdle_f sta tmp3 lda slowIdle_f sta tmp4 mov coolant,tmp5 jsr lininterp mov tmp6,idleTarget RPM_TEST: lda idleTarget add irestorerpm_f ; tests to determine what to do based on RPM cmp idlerpm ; now check rpms blo close_AIC_rpm ; close it above RPM threshold brset idashbit,EnhancedBits6,rpm_delay ; always go here when dashbit is set bra idleDC_test rpm_delay: lda idleDelayClock ; Make sure we settle below the thresh before we bne IdleDC_test ; clear the bit after the wait time bclr idashbit,EnhancedBits6 ; clear the dashbit after delay idleDC_test: ; make sure that idleDC is reasonable and not closed brclr idleon,engine,idash ; dashpot if idleon is not set lda idlemindc_f cmp idleDC bls IDLE_LOOP lda idlelastdc ; do not let idleDC drop below min for routine sta idleDC ; we want to idle, calc rpm and target bra IDLE_LOOP Idle_doneJMP: bra idle_done IDLE_LOOP: ; delay time is proportional to deviance lda ictlrpm2_f ; from target sta tmp1 ; upper limit of rpm deviance lda ictlrpm1_f sta tmp2 ; lower limit of rpm deviance lda idleperiod_f sta tmp3 ; faster idlectl, lower # lda idleperiod2_f sta tmp4 ; slower idlectl, higher # lda idlerpm sub idletarget sta tmp5 bcc Ctl_speed nega sta tmp5 ; rol tmp1 ; comment per KG ; SPEED THIS UP by halving the high rpm Ctl_speed: jsr lininterp lda tmp6 cmp idleCtlClock bhi Idle_done lda idleTarget add Ideadbnd_f ; add tol. e.g. 850+2=870rpm cmp idlerpm ; compare with idle rpm blo idle_dec ; if lower the outside range so adjust lda idleTarget sub Ideadbnd_f ; subtract 870-4=830rpm cmp idlerpm bhi idle_inc bra Idle_done ; idle is ok so exit IDLE_INC: ; idle rpm is too low increase duty cycle lda idledc cmp idlefreq_f ;these lines to accomodate freqs other than 100 beq Idle_done inca sta idledc bra IDLE_SAVE IDLE_DEC: ; idle rpm is too high decrease duty cycle lda idledc cmp idlemindc_f beq idle_done ; lower duty cycle limit deca sta idledc IDLE_SAVE: clr idleCtlClock ; clear delay counter sta idleLastDC ; Save the last active idle dutycycle Idle_done: |
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